JPH0280852U - - Google Patents
Info
- Publication number
- JPH0280852U JPH0280852U JP15836488U JP15836488U JPH0280852U JP H0280852 U JPH0280852 U JP H0280852U JP 15836488 U JP15836488 U JP 15836488U JP 15836488 U JP15836488 U JP 15836488U JP H0280852 U JPH0280852 U JP H0280852U
- Authority
- JP
- Japan
- Prior art keywords
- processor
- sub
- common bus
- main processor
- connect
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005856 abnormality Effects 0.000 claims description 4
- 238000001514 detection method Methods 0.000 claims description 4
- 230000002159 abnormal effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 1
Landscapes
- Hardware Redundancy (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15836488U JPH0280852U (en]) | 1988-12-05 | 1988-12-05 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15836488U JPH0280852U (en]) | 1988-12-05 | 1988-12-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0280852U true JPH0280852U (en]) | 1990-06-21 |
Family
ID=31438624
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15836488U Pending JPH0280852U (en]) | 1988-12-05 | 1988-12-05 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0280852U (en]) |
-
1988
- 1988-12-05 JP JP15836488U patent/JPH0280852U/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH0280852U (en]) | ||
| JPH01118915A (ja) | パーソナルコンピュータ | |
| JPH08152905A (ja) | プログラマブルコントローラの２重化システム | |
| JPH0755179Y2 (ja) | 並列多重電子連動装置 | |
| JPS6155750A (ja) | 計算機システムの警報処理方式 | |
| JPS60189037A (ja) | プログラマブルコントロ−ラの特殊ユニツト | |
| JPS62256162A (ja) | デユ−プレツクス計算機システムの切替制御装置 | |
| JPS6424461U (en]) | ||
| JPS6331429U (en]) | ||
| JPS62123531A (ja) | Ｃｐｕ監視装置 | |
| JPH0651827A (ja) | プログラムコントローラの異常監視システム | |
| JPH0257633U (en]) | ||
| JPS6361044U (en]) | ||
| JPH0250758U (en]) | ||
| JPS6111837A (ja) | 電源投入シ−ケンス制御回路 | |
| JPS6454103U (en]) | ||
| JPH0378791A (ja) | 図形表示システム | |
| JPH0227449A (ja) | ソフトウェア障害時の情報収集方式 | |
| JPH01146689U (en]) | ||
| JPH022748U (en]) | ||
| JPH02118846A (ja) | フオールトトレラントシステムのｃｐｕボード回路 | |
| JPH0246243U (en]) | ||
| JPH08272493A (ja) | 計算機電源制御システム | |
| JPH0196044U (en]) | ||
| JPH04209064A (ja) | プロセッサ間接続制御装置 |